Search Results for: multi processor systems on chip

95,965 documents

Integrating multiple forms of multithreaded execution on multi-SMT systems: a study with scientific applications

Integrating multiple forms of multithreaded execution on multi-SMT systems: a study with scientific applications
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A prediction method for multi-class systems based on limited data [clinical trials]

A prediction method for multi-class systems based on limited data [clinical trials]
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Performance Optimization for Networks-on-Chip Architectures using Multi-Level Network Partitioning

Among the most challenging problem in Network-on-Chip (NoC) is to customize the topological structure such as application mapping to provide the best performance…
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General analysis of multi-phase systems based on space vector approach

General analysis of multi-phase systems based on space vector approach
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Multi-agent Systems on the Internet: Extending the Scope of Coordination towards Security and Topology

Multi-agent Systems on the Internet: Extending the Scope of Coordination towards Security and Topology
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Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with On-Chip Local Memories

Abstract. Software cache has been showed as a robust approach in multi-core systems with no hardware support for transparent data transfers between local and…
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On cooperation in multi-agent systems

Abstract Cooperation is often presented as one of the key concepts which differentiates multi-agent systems from other related disciplines such as distributed…
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Independently-developed Systems on Multi-cores with Shared Resources

Abstract In this paper we propose a synchronization protocol for resource sharing among independently-developed real-time systems on multi-core platforms. The…
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Thermal-Aware Mapping of Streaming Applications on 3D Multi-Processor Systems

Thermal-Aware Mapping of Streaming Applications on 3D Multi-Processor Systems
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Reconfigurable Multi-Processor Network-on-Chip on FPGA

Reconfigurable Multi-Processor Network-on-Chip on FPGA
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An FPGA Design Flow for Reconfigurable Network-Based Multi-Processor Systems on Chip

An FPGA Design Flow for Reconfigurable Network-Based Multi-Processor Systems on Chip
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Interactive presentation: An FPGA design flow for reconfigurable network-based multi-processor systems on chip

Interactive presentation: An FPGA design flow for reconfigurable network-based multi-processor systems on chip
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Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic

A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-dimensional array of…
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